module controllor(
    input   logic [5:0] op,funct,
    input   logic       zero,
    output  logic       memtoreg, memwrite,
    output  logic       pcsrc,alusrc,
    output  logic       regdst,regwrite,
    output logic        jump,
    output  logic [2:0] alucontrol
);
 wire [1:0] aluop;
 wire       branch;

 maindec nd(op, memtoreg, memwrite, branch, alusrc, regdst, regwrite, aluop);
 aludec ad(funct, aluop, alucontrol);

 assign pcsrc = branch & zero;
endmodule